diff options
| author | Leandro A. F. Pereira <leandro@hardinfo.org> | 2007-12-01 00:55:00 +0000 |
|---|---|---|
| committer | Leandro A. F. Pereira <leandro@hardinfo.org> | 2007-12-01 00:55:00 +0000 |
| commit | 3145dd9198ed2e36352379b7738effcc117951e7 (patch) | |
| tree | eb4e2dcfebc1546146a40abadbcc9d15e46a8d8a /hardinfo2/arch/linux/x86 | |
| parent | d92466ce2e3be1e8760383ccf239cc0be2c804a5 (diff) | |
Apply a bunch of patches by berlios user esin (thanks!). Fixes some minor bugs.
Diffstat (limited to 'hardinfo2/arch/linux/x86')
| l--------- | hardinfo2/arch/linux/x86/net.h | 2 | ||||
| -rw-r--r-- | hardinfo2/arch/linux/x86/processor.h | 39 |
2 files changed, 40 insertions, 1 deletions
diff --git a/hardinfo2/arch/linux/x86/net.h b/hardinfo2/arch/linux/x86/net.h index 488b5ae3..72d77b26 120000 --- a/hardinfo2/arch/linux/x86/net.h +++ b/hardinfo2/arch/linux/x86/net.h @@ -1 +1 @@ -../../../arch/linux/common/net.h
\ No newline at end of file +../../linux/common/net.h
\ No newline at end of file diff --git a/hardinfo2/arch/linux/x86/processor.h b/hardinfo2/arch/linux/x86/processor.h index fd8711af..a57f0e71 100644 --- a/hardinfo2/arch/linux/x86/processor.h +++ b/hardinfo2/arch/linux/x86/processor.h @@ -254,6 +254,45 @@ static struct { { "tm", "Thermal Monitor" }, { "pbe", "Pending Break Enable" }, { "pb", "Pending Break Enable" }, + { "pn", "Processor serial number" }, + { "ds", "Debug Store" }, + { "xmm2", "Streaming SIMD Extensions-2" }, + { "xmm3", "Streaming SIMD Extensions-3" }, + { "selfsnoop", "CPU self snoop" }, + { "rdtscp", "RDTSCP" }, + { "recovery", "CPU in recovery mode" }, + { "longrun", "Longrun power control" }, + { "lrti", "LongRun table interface" }, + { "cxmmx", "Cyrix MMX extensions" }, + { "k6_mtrr", "AMD K6 nonstandard MTRRs" }, + { "cyrix_arr", "Cyrix ARRs (= MTRRs)" }, + { "centaur_mcr","Centaur MCRs (= MTRRs)" }, + { "constant_tsc","TSC ticks at a constant rate" }, + { "up", "smp kernel running on up" }, + { "fxsave_leak","FXSAVE leaks FOP/FIP/FOP" }, + { "arch_perfmon","Intel Architectural PerfMon" }, + { "pebs", "Precise-Event Based Sampling" }, + { "bts", "Branch Trace Store" }, + { "sync_rdtsc", "RDTSC synchronizes the CPU" }, + { "rep_good", "rep microcode works well on this CPU" }, + { "mwait", "Monitor/Mwait support" }, + { "ds_cpl", "CPL Qualified Debug Store" }, + { "est", "Enhanced SpeedStep" }, + { "tm2", "Thermal Monitor 2" }, + { "cid", "Context ID" }, + { "xtpr", "Send Task Priority Messages" }, + { "xstore", "on-CPU RNG present (xstore insn)" }, + { "xstore_en", "on-CPU RNG enabled" }, + { "xcrypt", "on-CPU crypto (xcrypt insn)" }, + { "xcrypt_en", "on-CPU crypto enabled" }, + { "ace2", "Advanced Cryptography Engine v2" }, + { "ace2_en", "ACE v2 enabled" }, + { "phe", "PadLock Hash Engine" }, + { "phe_en", "PHE enabled" }, + { "pmm", "PadLock Montgomery Multiplier" }, + { "pmm_en", "PMM enabled" }, + { "lahf_lm", "LAHF/SAHF in long mode" }, + { "cmp_legacy", "HyperThreading not valid" }, { NULL, NULL }, }; |