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authorhwspeedy <ns@bigbear.dk>2024-03-09 01:50:13 +0100
committerhwspeedy <ns@bigbear.dk>2024-03-09 01:50:13 +0100
commit703651e21ce78d3cf575975310c959dffcacc5c4 (patch)
treea8eac56d3c6c4c4cb7de91da2f66ed251f6305a4 /modules/devices/riscv/riscv_data.c
parent2e62573bf26bc1a8df77ae06c942e378ade8285a (diff)
ADD Risc V new isa Zk,S,U
Diffstat (limited to 'modules/devices/riscv/riscv_data.c')
-rw-r--r--modules/devices/riscv/riscv_data.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/modules/devices/riscv/riscv_data.c b/modules/devices/riscv/riscv_data.c
index 917e8e06..fc6d939a 100644
--- a/modules/devices/riscv/riscv_data.c
+++ b/modules/devices/riscv/riscv_data.c
@@ -47,6 +47,9 @@ static struct {
{ "Q", NC_("rv-ext", /*/ext:Q*/ "Floating-point instructions, quad-precision") },
{ "B", NC_("rv-ext", /*/ext:B*/ "Bit manipulation instructions") },
{ "V", NC_("rv-ext", /*/ext:V*/ "Vector operations") },
+ { "Zk", NC_("rv-ext", /*/ext:Zk*/ "Scalar Cryptography") },
+ { "S", NC_("rv-ext", /*/ext:S*/ "Supervisor-level Instructions") },
+ { "U", NC_("rv-ext", /*/ext:U*/ "User Mode") },
{ "T", NC_("rv-ext", /*/ext:T*/ "Transactional memory") },
{ "P", NC_("rv-ext", /*/ext:P*/ "Packed SIMD instructions") },
{ "L", NC_("rv-ext", /*/ext:L*/ "Decimal floating-point instructions") },