diff options
Diffstat (limited to 'modules/devices/arm')
| -rw-r--r-- | modules/devices/arm/arm_data.c | 235 | ||||
| -rw-r--r-- | modules/devices/arm/arm_data.h | 39 | ||||
| -rw-r--r-- | modules/devices/arm/processor.c | 515 |
3 files changed, 789 insertions, 0 deletions
diff --git a/modules/devices/arm/arm_data.c b/modules/devices/arm/arm_data.c new file mode 100644 index 00000000..aece272f --- /dev/null +++ b/modules/devices/arm/arm_data.c @@ -0,0 +1,235 @@ +/* + * rpiz - https://github.com/bp0/rpiz + * Copyright (C) 2017 Burt P. <pburt0@gmail.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + * + */ + +#include <stdlib.h> +#include <stdio.h> +#include <string.h> +#include "arm_data.h" + +#ifndef C_ +#define C_(Ctx, String) String +#endif +#ifndef NC_ +#define NC_(Ctx, String) String +#endif + +/* sources: + * https://unix.stackexchange.com/a/43563 + * git:linux/arch/arm/kernel/setup.c + * git:linux/arch/arm64/kernel/cpuinfo.c + */ +static struct { + char *name, *meaning; +} tab_flag_meaning[] = { + /* arm/hw_cap */ + { "swp", NC_("arm-flag", /*/flag:swp*/ "SWP instruction (atomic read-modify-write)") }, + { "half", NC_("arm-flag", /*/flag:half*/ "Half-word loads and stores") }, + { "thumb", NC_("arm-flag", /*/flag:thumb*/ "Thumb (16-bit instruction set)") }, + { "26bit", NC_("arm-flag", /*/flag:26bit*/ "26-Bit Model (Processor status register folded into program counter)") }, + { "fastmult", NC_("arm-flag", /*/flag:fastmult*/ "32x32->64-bit multiplication") }, + { "fpa", NC_("arm-flag", /*/flag:fpa*/ "Floating point accelerator") }, + { "vfp", NC_("arm-flag", /*/flag:vfp*/ "VFP (early SIMD vector floating point instructions)") }, + { "edsp", NC_("arm-flag", /*/flag:edsp*/ "DSP extensions (the 'e' variant of the ARM9 CPUs, and all others above)") }, + { "java", NC_("arm-flag", /*/flag:java*/ "Jazelle (Java bytecode accelerator)") }, + { "iwmmxt", NC_("arm-flag", /*/flag:iwmmxt*/ "SIMD instructions similar to Intel MMX") }, + { "crunch", NC_("arm-flag", /*/flag:crunch*/ "MaverickCrunch coprocessor (if kernel support enabled)") }, + { "thumbee", NC_("arm-flag", /*/flag:thumbee*/ "ThumbEE") }, + { "neon", NC_("arm-flag", /*/flag:neon*/ "Advanced SIMD/NEON on AArch32") }, + { "evtstrm", NC_("arm-flag", /*/flag:evtstrm*/ "Kernel event stream using generic architected timer") }, + { "vfpv3", NC_("arm-flag", /*/flag:vfpv3*/ "VFP version 3") }, + { "vfpv3d16", NC_("arm-flag", /*/flag:vfpv3d16*/ "VFP version 3 with 16 D-registers") }, + { "vfpv4", NC_("arm-flag", /*/flag:vfpv4*/ "VFP version 4 with fast context switching") }, + { "vfpd32", NC_("arm-flag", /*/flag:vfpd32*/ "VFP with 32 D-registers") }, + { "tls", NC_("arm-flag", /*/flag:tls*/ "TLS register") }, + { "idiva", NC_("arm-flag", /*/flag:idiva*/ "SDIV and UDIV hardware division in ARM mode") }, + { "idivt", NC_("arm-flag", /*/flag:idivt*/ "SDIV and UDIV hardware division in Thumb mode") }, + { "lpae", NC_("arm-flag", /*/flag:lpae*/ "40-bit Large Physical Address Extension") }, + /* arm/hw_cap2 */ + { "pmull", NC_("arm-flag", /*/flag:pmull*/ "64x64->128-bit F2m multiplication (arch>8)") }, + { "aes", NC_("arm-flag", /*/flag:aes*/ "Crypto:AES (arch>8)") }, + { "sha1", NC_("arm-flag", /*/flag:sha1*/ "Crypto:SHA1 (arch>8)") }, + { "sha2", NC_("arm-flag", /*/flag:sha2*/ "Crypto:SHA2 (arch>8)") }, + { "crc32", NC_("arm-flag", /*/flag:crc32*/ "CRC32 checksum instructions (arch>8)") }, + /* arm64/hw_cap */ + { "fp", NULL }, + { "asimd", NC_("arm-flag", /*/flag:asimd*/ "Advanced SIMD/NEON on AArch64 (arch>8)") }, + { "atomics", NULL }, + { "fphp", NULL }, + { "asimdhp", NULL }, + { "cpuid", NULL }, + { "asimdrdm", NULL }, + { "jscvt", NULL }, + { "fcma", NULL }, + { "lrcpc", NULL }, + { NULL, NULL } +}; + +static struct { + char *code; char *name; char *more; +} tab_arm_arch[] = { + { "7", "AArch32", "AArch32 (ARMv7)" }, + { "8", "AArch64", "AArch64 (ARMv8)" }, + { "AArch32", "AArch32", "AArch32 (ARMv7)" }, + { "AArch64", "AArch64", "AArch64 (ARMv8)" }, + { NULL, NULL, NULL }, +}; + +static char all_flags[1024] = ""; + +#define APPEND_FLAG(f) strcat(all_flags, f); strcat(all_flags, " "); +const char *arm_flag_list() { + int i = 0, built = 0; + built = strlen(all_flags); + if (!built) { + while(tab_flag_meaning[i].name != NULL) { + APPEND_FLAG(tab_flag_meaning[i].name); + i++; + } + } + return all_flags; +} + +const char *arm_flag_meaning(const char *flag) { + int i = 0; + if (flag) + while(tab_flag_meaning[i].name != NULL) { + if (strcmp(tab_flag_meaning[i].name, flag) == 0) { + if (tab_flag_meaning[i].meaning != NULL) + return C_("arm-flag", tab_flag_meaning[i].meaning); + else return NULL; + } + i++; + } + return NULL; +} + +#include "util_ids.h" + +gchar *arm_ids_file = NULL; + +void find_arm_ids_file() { + if (arm_ids_file) return; + char *file_search_order[] = { + g_build_filename(g_get_user_config_dir(), "hardinfo2", "arm.ids", NULL), + g_build_filename(params.path_data, "arm.ids", NULL), + NULL + }; + int n; + for(n = 0; file_search_order[n]; n++) { + if (!arm_ids_file && !access(file_search_order[n], R_OK)) + arm_ids_file = (gchar*) auto_free_on_exit( file_search_order[n] ); + else + g_free(file_search_order[n]); + } +} + +void arm_part(const char *imp_code, const char *part_code, char **imp, char **part) { + gchar *qpath = NULL; + ids_query_result result = {}; + unsigned int i,p; + + if (!arm_ids_file) + find_arm_ids_file(); + + i = strtol(imp_code, NULL, 0); + p = strtol(part_code, NULL, 0); + qpath = g_strdup_printf("%02x/%03x", i, p); + scan_ids_file(arm_ids_file, qpath, &result, -1); + g_free(qpath); + if (imp) + *imp = result.results[0] + ? g_strdup(result.results[0]) + : NULL; + if (part) + *part = result.results[1] + ? g_strdup(result.results[1]) + : NULL; +} + +const char *arm_arch(const char *cpuinfo_arch_str) { + int i = 0; + if (cpuinfo_arch_str) + while(tab_arm_arch[i].code) { + if (strcmp(tab_arm_arch[i].code, cpuinfo_arch_str) == 0) + return tab_arm_arch[i].name; + i++; + } + return cpuinfo_arch_str; +} + +const char *arm_arch_more(const char *cpuinfo_arch_str) { + int i = 0; + if (cpuinfo_arch_str) + while(tab_arm_arch[i].code) { + if (strcmp(tab_arm_arch[i].code, cpuinfo_arch_str) == 0) + return tab_arm_arch[i].more; + i++; + } + return cpuinfo_arch_str; +} + +char *arm_decoded_name(const char *imp, const char *part, const char *var, const char *rev, const char *arch, const char *model_name) { + char *dnbuff; + char *imp_name = NULL, *part_desc = NULL, *arch_name = NULL; + int r = 0, p = 0; + dnbuff = malloc(256); + if (dnbuff) { + memset(dnbuff, 0, 256); + + if (imp && arch && part && rev) { + /* http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0395b/CIHCAGHH.html + * variant and revision can be rendered r{variant}p{revision} */ + r = strtol(var, NULL, 0); + p = strtol(rev, NULL, 0); + arm_part(imp, part, &imp_name, &part_desc); + arch_name = (char*) arm_arch(arch); + if (imp_name || part_desc) { + if (arch_name != arch) + sprintf(dnbuff, "%s %s r%dp%d (%s)", + (imp_name) ? imp_name : imp, + (part_desc) ? part_desc : part, + r, p, arch_name); + else + sprintf(dnbuff, "%s %s r%dp%d (arch:%s)", + (imp_name) ? imp_name : imp, + (part_desc) ? part_desc : part, + r, p, arch); + } else { + /* fallback for now */ + sprintf(dnbuff, "%s [imp:%s part:%s r%dp%d arch:%s]", + model_name, + (imp_name) ? imp_name : imp, + (part_desc) ? part_desc : part, + r, p, arch); + } + g_free(imp_name); + g_free(part_desc); + } else { + /* prolly not ARM arch at all */ + if (model_name) + sprintf(dnbuff, "%s", model_name); + else { + free(dnbuff); + return NULL; + } + } + } + return dnbuff; +} diff --git a/modules/devices/arm/arm_data.h b/modules/devices/arm/arm_data.h new file mode 100644 index 00000000..0e93d323 --- /dev/null +++ b/modules/devices/arm/arm_data.h @@ -0,0 +1,39 @@ +/* + * rpiz - https://github.com/bp0/rpiz + * Copyright (C) 2017 Burt P. <pburt0@gmail.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + * + */ + +#ifndef _ARMDATA_H_ +#define _ARMDATA_H_ + +/* table lookups */ +void arm_part(const char *imp_code, const char *part_code, char **imp, char **part); +const char *arm_arch(const char *cpuinfo_arch_str); +const char *arm_arch_more(const char *cpuinfo_arch_str); + +/* cpu_implementer, cpu_part, cpu_variant, cpu_revision, cpu_architecture from /proc/cpuinfo + * strdup(model_name) is returned as a fallback if not enough data is known */ +char *arm_decoded_name( + const char *imp, const char *part, const char *var, const char *rev, + const char *arch, const char *model_name); + +/* cpu flags from /proc/cpuinfo */ +const char *arm_flag_list(void); /* list of all known flags */ +const char *arm_flag_meaning(const char *flag); /* lookup flag meaning */ + +#endif diff --git a/modules/devices/arm/processor.c b/modules/devices/arm/processor.c new file mode 100644 index 00000000..9446108d --- /dev/null +++ b/modules/devices/arm/processor.c @@ -0,0 +1,515 @@ +/* + * HardInfo - Displays System Information + * Copyright (C) 2003-2006 L. A. F. Pereira <l@tia.mat.br> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, version 2 or later. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include "hardinfo.h" +#include "devices.h" +#include "cpu_util.h" +#include "dt_util.h" + +#include "arm_data.h" +#include "arm_data.c" + +enum { + ARM_A32 = 0, + ARM_A64 = 1, + ARM_A32_ON_A64 = 2, +}; + +static const gchar *arm_mode_str[] = { + "A32", + "A64", + "A32 on A64", +}; + +GSList * +processor_scan(void) +{ + GSList *procs = NULL; + Processor *processor = NULL; + FILE *cpuinfo; + gchar buffer[128]; + gchar *rep_pname = NULL; + GSList *pi = NULL; + dtr *dt = dtr_new(NULL); + + cpuinfo = fopen(PROC_CPUINFO, "r"); + if (!cpuinfo) + return NULL; + +#define CHECK_FOR(k) (g_str_has_prefix(tmp[0], k)) + while (fgets(buffer, 128, cpuinfo)) { + gchar **tmp = g_strsplit(buffer, ":", 2); + if (tmp[0] && tmp[1]) { + tmp[0] = g_strstrip(tmp[0]); + tmp[1] = g_strstrip(tmp[1]); + } else { + g_strfreev(tmp); + continue; + } + + get_str("Processor", rep_pname); + + if ( CHECK_FOR("processor") ) { + /* finish previous */ + if (processor) { + procs = g_slist_append(procs, processor); + } + + /* start next */ + processor = g_new0(Processor, 1); + processor->id = atol(tmp[1]); + + if (rep_pname) + processor->linux_name = g_strdup(rep_pname); + + g_strfreev(tmp); + continue; + } + + if (!processor && + ( CHECK_FOR("model name") + || CHECK_FOR("Features") + || CHECK_FOR("BogoMIPS") ) ) { + + /* single proc/core may not have "processor : n" */ + processor = g_new0(Processor, 1); + processor->id = 0; + + if (rep_pname) + processor->linux_name = g_strdup(rep_pname); + } + + if (processor) { + get_str("model name", processor->linux_name); + get_str("Features", processor->flags); + get_float("BogoMIPS", processor->bogomips); + + get_str("CPU implementer", processor->cpu_implementer); + get_str("CPU architecture", processor->cpu_architecture); + get_str("CPU variant", processor->cpu_variant); + get_str("CPU part", processor->cpu_part); + get_str("CPU revision", processor->cpu_revision); + } + g_strfreev(tmp); + } + + if (processor) + procs = g_slist_append(procs, processor); + + g_free(rep_pname); + fclose(cpuinfo); + + /* re-duplicate missing data for /proc/cpuinfo variant that de-duplicated it */ +#define REDUP(f) if (dproc->f && !processor->f) processor->f = g_strdup(dproc->f); + Processor *dproc; + GSList *l; + l = procs = g_slist_reverse(procs); + while (l) { + processor = l->data; + if (processor->flags) { + dproc = processor; + } else if (dproc) { + REDUP(flags); + REDUP(cpu_implementer); + REDUP(cpu_architecture); + REDUP(cpu_variant); + REDUP(cpu_part); + REDUP(cpu_revision); + } + l = g_slist_next(l); + } + procs = g_slist_reverse(procs); + + /* data not from /proc/cpuinfo */ + for (pi = procs; pi; pi = pi->next) { + processor = (Processor *) pi->data; + + /* strings can't be null or segfault later */ + STRIFNULL(processor->linux_name, _("ARM Processor") ); + EMPIFNULL(processor->flags); + UNKIFNULL(processor->cpu_implementer); + UNKIFNULL(processor->cpu_architecture); + UNKIFNULL(processor->cpu_variant); + UNKIFNULL(processor->cpu_part); + UNKIFNULL(processor->cpu_revision); + + processor->model_name = arm_decoded_name( + processor->cpu_implementer, processor->cpu_part, + processor->cpu_variant, processor->cpu_revision, + processor->cpu_architecture, processor->linux_name); + UNKIFNULL(processor->model_name); + + /* topo & freq */ + processor->cpufreq = cpufreq_new(processor->id); + processor->cputopo = cputopo_new(processor->id); + + if (processor->cpufreq->cpukhz_max) + processor->cpu_mhz = processor->cpufreq->cpukhz_max / 1000; + else + processor->cpu_mhz = 0.0f; + + /* Try OPP, although if it exists, it should have been available + * via cpufreq. */ + if (dt && processor->cpu_mhz == 0.0f) { + gchar *dt_cpu_path = g_strdup_printf("/cpus/cpu@%d", processor->id); + dt_opp_range *opp = dtr_get_opp_range(dt, dt_cpu_path); + if (opp) { + processor->cpu_mhz = (double)opp->khz_max / 1000; + g_free(opp); + } + g_free(dt_cpu_path); + } + + /* mode */ + processor->mode = ARM_A32; + if ( processor_has_flag(processor->flags, "pmull") + || processor_has_flag(processor->flags, "crc32") ) { +#ifdef __aarch64__ + processor->mode = ARM_A64; +#else + processor->mode = ARM_A32_ON_A64; +#endif + } + } + dtr_free(dt); + + return procs; +} + +gchar *processor_get_capabilities_from_flags(gchar * strflags) +{ + gchar **flags, **old; + gchar *tmp = NULL; + gint j = 0; + + flags = g_strsplit(strflags, " ", 0); + old = flags; + + while (flags[j]) { + const gchar *meaning = arm_flag_meaning( flags[j] ); + + if (meaning) { + tmp = h_strdup_cprintf("%s=%s\n", tmp, flags[j], meaning); + } else { + tmp = h_strdup_cprintf("%s=\n", tmp, flags[j]); + } + j++; + } + if (tmp == NULL || g_strcmp0(tmp, "") == 0) + tmp = g_strdup_printf("%s=%s\n", "empty", _("Empty List")); + + g_strfreev(old); + return tmp; +} + +#define khzint_to_mhzdouble(k) (((double)k)/1000) +#define cmp_clocks_test(f) if (a->f < b->f) return -1; if (a->f > b->f) return 1; + +static gint cmp_cpufreq_data(cpufreq_data *a, cpufreq_data *b) { + gint i = 0; + i = g_strcmp0(a->shared_list, b->shared_list); if (i!=0) return i; + cmp_clocks_test(cpukhz_max); + cmp_clocks_test(cpukhz_min); + return 0; +} + +static gint cmp_cpufreq_data_ignore_affected(cpufreq_data *a, cpufreq_data *b) { + gint i = 0; + cmp_clocks_test(cpukhz_max); + cmp_clocks_test(cpukhz_min); + return 0; +} + +gchar *clocks_summary(GSList * processors) +{ + gchar *ret = g_strdup_printf("[%s]\n", _("Clocks")); + GSList *all_clocks = NULL, *uniq_clocks = NULL; + GSList *tmp, *l; + Processor *p; + cpufreq_data *c, *cur = NULL; + gint cur_count = 0, i = 0; + + /* create list of all clock references */ + for (l = processors; l; l = l->next) { + p = (Processor*)l->data; + if (p->cpufreq && p->cpufreq->cpukhz_max > 0) { + all_clocks = g_slist_prepend(all_clocks, p->cpufreq); + } + } + + if (g_slist_length(all_clocks) == 0) { + ret = h_strdup_cprintf("%s=\n", ret, _("(Not Available)") ); + g_slist_free(all_clocks); + return ret; + } + + /* ignore duplicate references */ + all_clocks = g_slist_sort(all_clocks, (GCompareFunc)cmp_cpufreq_data); + for (l = all_clocks; l; l = l->next) { + c = (cpufreq_data*)l->data; + if (!cur) { + cur = c; + } else { + if (cmp_cpufreq_data(cur, c) != 0) { + uniq_clocks = g_slist_prepend(uniq_clocks, cur); + cur = c; + } + } + } + uniq_clocks = g_slist_prepend(uniq_clocks, cur); + uniq_clocks = g_slist_reverse(uniq_clocks); + cur = 0, cur_count = 0; + + /* count and list clocks */ + for (l = uniq_clocks; l; l = l->next) { + c = (cpufreq_data*)l->data; + if (!cur) { + cur = c; + cur_count = 1; + } else { + if (cmp_cpufreq_data_ignore_affected(cur, c) != 0) { + ret = h_strdup_cprintf(_("%.2f-%.2f %s=%dx\n"), + ret, + khzint_to_mhzdouble(cur->cpukhz_min), + khzint_to_mhzdouble(cur->cpukhz_max), + _("MHz"), + cur_count); + cur = c; + cur_count = 1; + } else { + cur_count++; + } + } + } + ret = h_strdup_cprintf(_("%.2f-%.2f %s=%dx\n"), + ret, + khzint_to_mhzdouble(cur->cpukhz_min), + khzint_to_mhzdouble(cur->cpukhz_max), + _("MHz"), + cur_count); + + g_slist_free(all_clocks); + g_slist_free(uniq_clocks); + return ret; +} + +gchar * +processor_get_detailed_info(Processor *processor) +{ + gchar *tmp_flags, *tmp_imp = NULL, *tmp_part = NULL, + *tmp_arch, *tmp_cpufreq, *tmp_topology, *ret; + tmp_flags = processor_get_capabilities_from_flags(processor->flags); + arm_part(processor->cpu_implementer, processor->cpu_part, &tmp_imp, &tmp_part); + tmp_arch = (char*)arm_arch_more(processor->cpu_architecture); + + tmp_topology = cputopo_section_str(processor->cputopo); + tmp_cpufreq = cpufreq_section_str(processor->cpufreq); + + ret = g_strdup_printf("[%s]\n" + "%s=%s\n" /* linux name */ + "%s=%s\n" /* decoded name */ + "%s=%s\n" /* mode */ + "%s=%.2f %s\n" /* frequency */ + "%s=%.2f\n" /* bogomips */ + "%s=%s\n" /* byte order */ + "%s" /* topology */ + "%s" /* frequency scaling */ + "[%s]\n" /* ARM */ + "%s=[%s] %s\n" /* implementer */ + "%s=[%s] %s\n" /* part */ + "%s=[%s] %s\n" /* architecture */ + "%s=%s\n" /* variant */ + "%s=%s\n" /* revision */ + "[%s]\n" /* flags */ + "%s" + "%s", /* empty */ + _("Processor"), + _("Linux Name"), processor->linux_name, + _("Decoded Name"), processor->model_name, + _("Mode"), arm_mode_str[processor->mode], + _("Frequency"), processor->cpu_mhz, _("MHz"), + _("BogoMips"), processor->bogomips, + _("Byte Order"), byte_order_str(), + tmp_topology, + tmp_cpufreq, + _("ARM"), + _("Implementer"), processor->cpu_implementer, (tmp_imp) ? tmp_imp : "", + _("Part"), processor->cpu_part, (tmp_part) ? tmp_part : "", + _("Architecture"), processor->cpu_architecture, (tmp_arch) ? tmp_arch : "", + _("Variant"), processor->cpu_variant, + _("Revision"), processor->cpu_revision, + _("Capabilities"), tmp_flags, + ""); + g_free(tmp_flags); + g_free(tmp_cpufreq); + g_free(tmp_topology); + return ret; +} + +gchar *processor_name(GSList *processors) { + /* compatible contains a list of compatible hardware, so be careful + * with matching order. + * ex: "ti,omap3-beagleboard-xm", "ti,omap3450", "ti,omap3"; + * matches "omap3 family" first. + * ex: "brcm,bcm2837", "brcm,bcm2836"; + * would match 2836 when it is a 2837. + */ +#define UNKSOC "(Unknown)" /* don't translate this */ + const struct { + char *search_str; + char *vendor; + char *soc; + } dt_compat_searches[] = { + { "brcm,bcm2838", "Broadcom", "BCM2838" }, // RPi 4 + { "brcm,bcm2837", "Broadcom", "BCM2837" }, // RPi 3 + { "brcm,bcm2836", "Broadcom", "BCM2836" }, // RPi 2 + { "brcm,bcm2835", "Broadcom", "BCM2835" }, // RPi 1 + { "rockchip,rk3288", "Rockchip", "RK3288" }, // Asus Tinkerboard + { "rockchip,rk3328", "Rockchip", "RK3328" }, // Firefly Renegade + { "rockchip,rk3399", "Rockchip", "RK3399" }, // Firefly Renegade Elite + { "rockchip,rk32", "Rockchip", "RK32xx-family" }, + { "rockchip,rk33", "Rockchip", "RK33xx-family" }, + { "ti,omap5432", "Texas Instruments", "OMAP5432" }, + { "ti,omap5430", "Texas Instruments", "OMAP5430" }, + { "ti,omap4470", "Texas Instruments", "OMAP4470" }, + { "ti,omap4460", "Texas Instruments", "OMAP4460" }, + { "ti,omap4430", "Texas Instruments", "OMAP4430" }, + { "ti,omap3620", "Texas Instruments", "OMAP3620" }, + { "ti,omap3450", "Texas Instruments", "OMAP3450" }, + { "ti,omap5", "Texas Instruments", "OMAP5-family" }, + { "ti,omap4", "Texas Instruments", "OMAP4-family" }, + { "ti,omap3", "Texas Instruments", "OMAP3-family" }, + { "ti,omap2", "Texas Instruments", "OMAP2-family" }, + { "ti,omap1", "Texas Instruments", "OMAP1-family" }, + { "mediatek,mt6799", "MediaTek", "MT6799 Helio X30" }, + { "mediatek,mt6799", "MediaTek", "MT6799 Helio X30" }, + { "mediatek,mt6797x", "MediaTek", "MT6797X Helio X27" }, + { "mediatek,mt6797t", "MediaTek", "MT6797T Helio X25" }, + { "mediatek,mt6797", "MediaTek", "MT6797 Helio X20" }, + { "mediatek,mt6757T", "MediaTek", "MT6757T Helio P25" }, + { "mediatek,mt6757", "MediaTek", "MT6757 Helio P20" }, + { "mediatek,mt6795", "MediaTek", "MT6795 Helio X10" }, + { "mediatek,mt6755", "MediaTek", "MT6755 Helio P10" }, + { "mediatek,mt6750t", "MediaTek", "MT6750T" }, + { "mediatek,mt6750", "MediaTek", "MT6750" }, + { "mediatek,mt6753", "MediaTek", "MT6753" }, + { "mediatek,mt6752", "MediaTek", "MT6752" }, + { "mediatek,mt6738", "MediaTek", "MT6738" }, + { "mediatek,mt6737t", "MediaTek", "MT6737T" }, + { "mediatek,mt6735", "MediaTek", "MT6735" }, + { "mediatek,mt6732", "MediaTek", "MT6732" }, + { "qcom,msm8939", "Qualcomm", "Snapdragon 615"}, + { "qcom,msm", "Qualcomm", "Snapdragon-family"}, + { "nvidia,tegra", "nVidia", "Tegra-family" }, + { "brcm,", "Broadcom", UNKSOC }, + { "nvidia,", "nVidia", UNKSOC }, + { "rockchip,", "Rockchip", UNKSOC }, + { "ti,", "Texas Instruments", UNKSOC }, + { "qcom,", "Qualcom", UNKSOC }, + { "mediatek,", "MediaTek", UNKSOC }, + { "amlogic,", "Amlogic", UNKSOC }, + { "allwinner,", "Allwinner", UNKSOC }, + { NULL, NULL } + }; + gchar *ret = NULL; + gchar *compat = NULL; + int i; + + compat = dtr_get_string("/compatible", 1); + + if (compat != NULL) { + i = 0; + while(dt_compat_searches[i].search_str != NULL) { + if (strstr(compat, dt_compat_searches[i].search_str) != NULL) { + ret = g_strdup_printf("%s %s", dt_compat_searches[i].vendor, dt_compat_searches[i].soc); + break; + } + i++; + } + } + g_free(compat); + UNKIFNULL(ret); + return ret; +} + +gchar *processor_describe(GSList * processors) { + return processor_describe_by_counting_names(processors); +} + +gchar *processor_meta(GSList * processors) { + gchar *meta_soc = processor_name(processors); + gchar *meta_cpu_desc = processor_describe(processors); + gchar *meta_cpu_topo = processor_describe_default(processors); + gchar *meta_freq_desc = processor_frequency_desc(processors); + gchar *meta_clocks = clocks_summary(processors); + gchar *ret = NULL; + UNKIFNULL(meta_cpu_desc); + ret = g_strdup_printf("[%s]\n" + "%s=%s\n" + "%s=%s\n" + "%s=%s\n" + "%s=%s\n" + "%s", + _("SOC/Package"), + _("Name"), meta_soc, + _("Description"), meta_cpu_desc, + _("Topology"), meta_cpu_topo, + _("Logical CPU Config"), meta_freq_desc, + meta_clocks ); + g_free(meta_soc); + g_free(meta_cpu_desc); + g_free(meta_cpu_topo); + g_free(meta_freq_desc); + g_free(meta_clocks); + return ret; +} + +gchar *processor_get_info(GSList * processors) +{ + Processor *processor; + gchar *ret, *tmp, *hashkey; + gchar *meta; /* becomes owned by more_info? no need to free? */ + GSList *l; + + tmp = g_strdup_printf("$!CPU_META$%s=\n", _("SOC/Package Information") ); + + meta = processor_meta(processors); + moreinfo_add_with_prefix("DEV", "CPU_META", meta); + + for (l = processors; l; l = l->next) { + processor = (Processor *) l->data; + + tmp = g_strdup_printf("%s$CPU%d$%s=%.2f %s\n", + tmp, processor->id, + processor->model_name, + processor->cpu_mhz, _("MHz")); + + hashkey = g_strdup_printf("CPU%d", processor->id); + moreinfo_add_with_prefix("DEV", hashkey, + processor_get_detailed_info(processor)); + g_free(hashkey); + } + + ret = g_strdup_printf("[$ShellParam$]\n" + "ViewType=1\n" + "[Processors]\n" + "%s", tmp); + g_free(tmp); + + return ret; +} |