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-rw-r--r--modules/devices/arm/arm_data.c95
-rw-r--r--modules/devices/arm/processor.c258
2 files changed, 210 insertions, 143 deletions
diff --git a/modules/devices/arm/arm_data.c b/modules/devices/arm/arm_data.c
index 2e2cbe60..60e8ea34 100644
--- a/modules/devices/arm/arm_data.c
+++ b/modules/devices/arm/arm_data.c
@@ -23,6 +23,13 @@
#include <string.h>
#include "arm_data.h"
+#ifndef C_
+#define C_(Ctx, String) String
+#endif
+#ifndef NC_
+#define NC_(Ctx, String) String
+#endif
+
/* sources:
* https://unix.stackexchange.com/a/43563
* git:linux/arch/arm/kernel/setup.c
@@ -32,47 +39,46 @@ static struct {
char *name, *meaning;
} tab_flag_meaning[] = {
/* arm/hw_cap */
- { "swp", "SWP instruction (atomic read-modify-write)" },
- { "half", "Half-word loads and stores" },
- { "thumb", "Thumb (16-bit instruction set)" },
- { "26bit", "26-Bit Model (Processor status register folded into program counter)" },
- { "fastmult", "32x32->64-bit multiplication" },
- { "fpa", "Floating point accelerator" },
- { "vfp", "VFP (early SIMD vector floating point instructions)" },
- { "edsp", "DSP extensions (the 'e' variant of the ARM9 CPUs, and all others above)" },
- { "java", "Jazelle (Java bytecode accelerator)" },
- { "iwmmxt", "SIMD instructions similar to Intel MMX" },
- { "crunch", "MaverickCrunch coprocessor (if kernel support enabled)" },
- { "thumbee", "ThumbEE" },
- { "neon", "Advanced SIMD/NEON on AArch32" },
- { "evtstrm", "kernel event stream using generic architected timer" },
- { "vfpv3", "VFP version 3" },
- { "vfpv3d16", "VFP version 3 with 16 D-registers" },
- { "vfpv4", "VFP version 4 with fast context switching" },
- { "vfpd32", "VFP with 32 D-registers" },
- { "tls", "TLS register" },
- { "idiva", "SDIV and UDIV hardware division in ARM mode" },
- { "idivt", "SDIV and UDIV hardware division in Thumb mode" },
- { "lpae", "40-bit Large Physical Address Extension" },
+ { "swp", NC_("arm-flag", /*/flag:swp*/ "SWP instruction (atomic read-modify-write)") },
+ { "half", NC_("arm-flag", /*/flag:half*/ "Half-word loads and stores") },
+ { "thumb", NC_("arm-flag", /*/flag:thumb*/ "Thumb (16-bit instruction set)") },
+ { "26bit", NC_("arm-flag", /*/flag:26bit*/ "26-Bit Model (Processor status register folded into program counter)") },
+ { "fastmult", NC_("arm-flag", /*/flag:fastmult*/ "32x32->64-bit multiplication") },
+ { "fpa", NC_("arm-flag", /*/flag:fpa*/ "Floating point accelerator") },
+ { "vfp", NC_("arm-flag", /*/flag:vfp*/ "VFP (early SIMD vector floating point instructions)") },
+ { "edsp", NC_("arm-flag", /*/flag:edsp*/ "DSP extensions (the 'e' variant of the ARM9 CPUs, and all others above)") },
+ { "java", NC_("arm-flag", /*/flag:java*/ "Jazelle (Java bytecode accelerator)") },
+ { "iwmmxt", NC_("arm-flag", /*/flag:iwmmxt*/ "SIMD instructions similar to Intel MMX") },
+ { "crunch", NC_("arm-flag", /*/flag:crunch*/ "MaverickCrunch coprocessor (if kernel support enabled)") },
+ { "thumbee", NC_("arm-flag", /*/flag:thumbee*/ "ThumbEE") },
+ { "neon", NC_("arm-flag", /*/flag:neon*/ "Advanced SIMD/NEON on AArch32") },
+ { "evtstrm", NC_("arm-flag", /*/flag:evtstrm*/ "Kernel event stream using generic architected timer") },
+ { "vfpv3", NC_("arm-flag", /*/flag:vfpv3*/ "VFP version 3") },
+ { "vfpv3d16", NC_("arm-flag", /*/flag:vfpv3d16*/ "VFP version 3 with 16 D-registers") },
+ { "vfpv4", NC_("arm-flag", /*/flag:vfpv4*/ "VFP version 4 with fast context switching") },
+ { "vfpd32", NC_("arm-flag", /*/flag:vfpd32*/ "VFP with 32 D-registers") },
+ { "tls", NC_("arm-flag", /*/flag:tls*/ "TLS register") },
+ { "idiva", NC_("arm-flag", /*/flag:idiva*/ "SDIV and UDIV hardware division in ARM mode") },
+ { "idivt", NC_("arm-flag", /*/flag:idivt*/ "SDIV and UDIV hardware division in Thumb mode") },
+ { "lpae", NC_("arm-flag", /*/flag:lpae*/ "40-bit Large Physical Address Extension") },
/* arm/hw_cap2 */
- { "pmull", "64x64->128-bit F2m multiplication (arch>8)" },
- { "aes", "Crypto:AES (arch>8)" },
- { "sha1", "Crypto:SHA1 (arch>8)" },
- { "sha2", "Crypto:SHA2 (arch>8)" },
- { "crc32", "CRC32 checksum instructions (arch>8)" },
+ { "pmull", NC_("arm-flag", /*/flag:pmull*/ "64x64->128-bit F2m multiplication (arch>8)") },
+ { "aes", NC_("arm-flag", /*/flag:aes*/ "Crypto:AES (arch>8)") },
+ { "sha1", NC_("arm-flag", /*/flag:sha1*/ "Crypto:SHA1 (arch>8)") },
+ { "sha2", NC_("arm-flag", /*/flag:sha2*/ "Crypto:SHA2 (arch>8)") },
+ { "crc32", NC_("arm-flag", /*/flag:crc32*/ "CRC32 checksum instructions (arch>8)") },
/* arm64/hw_cap */
- { "fp", "" },
- { "asimd", "Advanced SIMD/NEON on AArch64 (arch>8)" },
- { "atomics", "" },
- { "fphp", "" },
- { "asimdhp", "" },
- { "cpuid", "" },
- { "asimdrdm", "" },
- { "jscvt", "" },
- { "fcma", "" },
- { "lrcpc", "" },
-
- { NULL, NULL},
+ { "fp", NULL },
+ { "asimd", NC_("arm-flag", /*/flag:asimd*/ "Advanced SIMD/NEON on AArch64 (arch>8)") },
+ { "atomics", NULL },
+ { "fphp", NULL },
+ { "asimdhp", NULL },
+ { "cpuid", NULL },
+ { "asimdrdm", NULL },
+ { "jscvt", NULL },
+ { "fcma", NULL },
+ { "lrcpc", NULL },
+ { NULL, NULL }
};
static struct {
@@ -108,9 +114,11 @@ static struct {
/*d */ { 0xd01, "Cortex-A32" },
/*dt*/ { 0xd03, "Cortex-A53" },
/*d */ { 0xd04, "Cortex-A35" },
+ /*d */ { 0xd05, "Cortex-A55" },
/*d */ { 0xd07, "Cortex-A57 MPCore" },
/*d */ { 0xd08, "Cortex-A72" },
/*d */ { 0xd09, "Cortex-A73" },
+ /*d */ { 0xd0a, "Cortex-A75" },
{ 0, NULL},
};
@@ -143,8 +151,11 @@ const char *arm_flag_meaning(const char *flag) {
int i = 0;
if (flag)
while(tab_flag_meaning[i].name != NULL) {
- if (strcmp(tab_flag_meaning[i].name, flag) == 0)
- return tab_flag_meaning[i].meaning;
+ if (strcmp(tab_flag_meaning[i].name, flag) == 0) {
+ if (tab_flag_meaning[i].meaning != NULL)
+ return C_("arm-flag", tab_flag_meaning[i].meaning);
+ else return NULL;
+ }
i++;
}
return NULL;
@@ -220,7 +231,7 @@ char *arm_decoded_name(const char *imp, const char *part, const char *var, const
p = strtol(rev, NULL, 0);
imp_name = (char*) arm_implementer(imp);
part_desc = (char*) arm_part(imp, part);
- arch_name = (char *) arm_arch(arch);
+ arch_name = (char*) arm_arch(arch);
if (imp_name || part_desc) {
if (arch_name != arch)
sprintf(dnbuff, "%s %s r%dp%d (%s)",
diff --git a/modules/devices/arm/processor.c b/modules/devices/arm/processor.c
index ad7adf7f..e9446229 100644
--- a/modules/devices/arm/processor.c
+++ b/modules/devices/arm/processor.c
@@ -18,6 +18,8 @@
#include "hardinfo.h"
#include "devices.h"
+#include "cpu_util.h"
+#include "dt_util.h"
#include "arm_data.h"
#include "arm_data.c"
@@ -34,34 +36,6 @@ static const gchar *arm_mode_str[] = {
"A32 on A64",
};
-static gint get_cpu_int(const gchar* file, gint cpuid) {
- gchar *tmp0 = NULL;
- gchar *tmp1 = NULL;
- gint ret = 0;
-
- tmp0 = g_strdup_printf("/sys/devices/system/cpu/cpu%d/%s", cpuid, file);
- g_file_get_contents(tmp0, &tmp1, NULL, NULL);
- if (tmp1)
- ret = atol(tmp1);
- g_free(tmp0);
- g_free(tmp1);
- return ret;
-}
-
-int processor_has_flag(gchar * strflags, gchar * strflag)
-{
- gchar **flags;
- gint ret = 0;
- if (strflags == NULL || strflag == NULL)
- return 0;
- flags = g_strsplit(strflags, " ", 0);
- ret = g_strv_contains((const gchar * const *)flags, strflag);
- g_strfreev(flags);
- return ret;
-}
-
-#define PROC_CPUINFO "/proc/cpuinfo"
-
GSList *
processor_scan(void)
{
@@ -70,7 +44,6 @@ processor_scan(void)
FILE *cpuinfo;
gchar buffer[128];
gchar *rep_pname = NULL;
- gchar *tmpfreq_str = NULL;
GSList *pi = NULL;
cpuinfo = fopen(PROC_CPUINFO, "r");
@@ -101,7 +74,7 @@ processor_scan(void)
processor->id = atol(tmp[1]);
if (rep_pname)
- processor->model_name = g_strdup(rep_pname);
+ processor->linux_name = g_strdup(rep_pname);
g_strfreev(tmp);
continue;
@@ -117,11 +90,11 @@ processor_scan(void)
processor->id = 0;
if (rep_pname)
- processor->model_name = g_strdup(rep_pname);
+ processor->linux_name = g_strdup(rep_pname);
}
if (processor) {
- get_str("model name", processor->model_name);
+ get_str("model name", processor->linux_name);
get_str("Features", processor->flags);
get_float("BogoMIPS", processor->bogomips);
@@ -166,29 +139,26 @@ processor_scan(void)
processor = (Processor *) pi->data;
/* strings can't be null or segfault later */
-#define STRIFNULL(f,cs) if (processor->f == NULL) processor->f = g_strdup(cs);
-#define UNKIFNULL(f) STRIFNULL(f, "(Unknown)")
-#define EMPIFNULL(f) STRIFNULL(f, "")
- STRIFNULL(model_name, "ARM Processor");
- EMPIFNULL(flags);
- UNKIFNULL(cpu_implementer);
- UNKIFNULL(cpu_architecture);
- UNKIFNULL(cpu_variant);
- UNKIFNULL(cpu_part);
- UNKIFNULL(cpu_revision);
-
- processor->decoded_name = arm_decoded_name(
+ STRIFNULL(processor->linux_name, _("ARM Processor") );
+ EMPIFNULL(processor->flags);
+ UNKIFNULL(processor->cpu_implementer);
+ UNKIFNULL(processor->cpu_architecture);
+ UNKIFNULL(processor->cpu_variant);
+ UNKIFNULL(processor->cpu_part);
+ UNKIFNULL(processor->cpu_revision);
+
+ processor->model_name = arm_decoded_name(
processor->cpu_implementer, processor->cpu_part,
processor->cpu_variant, processor->cpu_revision,
- processor->cpu_architecture, processor->model_name);
- UNKIFNULL(decoded_name);
-
- /* freq */
- processor->cpukhz_cur = get_cpu_int("cpufreq/scaling_cur_freq", processor->id);
- processor->cpukhz_min = get_cpu_int("cpufreq/scaling_min_freq", processor->id);
- processor->cpukhz_max = get_cpu_int("cpufreq/scaling_max_freq", processor->id);
- if (processor->cpukhz_max)
- processor->cpu_mhz = processor->cpukhz_max / 1000;
+ processor->cpu_architecture, processor->linux_name);
+ UNKIFNULL(processor->model_name);
+
+ /* topo & freq */
+ processor->cpufreq = cpufreq_new(processor->id);
+ processor->cputopo = cputopo_new(processor->id);
+
+ if (processor->cpufreq->cpukhz_max)
+ processor->cpu_mhz = processor->cpufreq->cpukhz_max / 1000;
else
processor->cpu_mhz = 0.0f;
@@ -236,78 +206,168 @@ gchar *processor_get_capabilities_from_flags(gchar * strflags)
gchar *
processor_get_detailed_info(Processor *processor)
{
- gchar *tmp_flags, *tmp_imp, *tmp_part, *tmp_arch, *ret;
+ gchar *tmp_flags, *tmp_imp, *tmp_part, *tmp_arch, *tmp_cpufreq, *tmp_topology, *ret;
tmp_flags = processor_get_capabilities_from_flags(processor->flags);
tmp_imp = (char*)arm_implementer(processor->cpu_implementer);
tmp_part = (char*)arm_part(processor->cpu_implementer, processor->cpu_part);
tmp_arch = (char*)arm_arch_more(processor->cpu_architecture);
- ret = g_strdup_printf("[Processor]\n"
- "Linux Name=%s\n"
- "Decoded Name=%s\n"
- "Mode=%s\n"
- "BogoMips=%.2f\n"
- "Endianesss="
-#if G_BYTE_ORDER == G_LITTLE_ENDIAN
- "Little Endian"
-#else
- "Big Endian"
-#endif
- "\n"
- "[Frequency Scaling]\n"
- "Minimum=%d kHz\n"
- "Maximum=%d kHz\n"
- "Current=%d kHz\n"
- "[ARM]\n"
- "Implementer=[%s] %s\n"
- "Part=[%s] %s\n"
- "Architecture=[%s] %s\n"
- "Variant=%s\n"
- "Revision=%s\n"
- "[Capabilities]\n"
+ tmp_topology = cputopo_section_str(processor->cputopo);
+ tmp_cpufreq = cpufreq_section_str(processor->cpufreq);
+
+ ret = g_strdup_printf("[%s]\n"
+ "%s=%s\n" /* linux name */
+ "%s=%s\n" /* decoded name */
+ "%s=%s\n" /* mode */
+ "%s=%.2f %s\n" /* frequency */
+ "%s=%.2f\n" /* bogomips */
+ "%s=%s\n" /* byte order */
+ "%s" /* topology */
+ "%s" /* frequency scaling */
+ "[%s]\n" /* ARM */
+ "%s=[%s] %s\n" /* implementer */
+ "%s=[%s] %s\n" /* part */
+ "%s=[%s] %s\n" /* architecture */
+ "%s=%s\n" /* variant */
+ "%s=%s\n" /* revision */
+ "[%s]\n" /* flags */
"%s"
- "%s",
- processor->model_name,
- processor->decoded_name,
- arm_mode_str[processor->mode],
- processor->bogomips,
- processor->cpukhz_min,
- processor->cpukhz_max,
- processor->cpukhz_cur,
- processor->cpu_implementer, (tmp_imp) ? tmp_imp : "",
- processor->cpu_part, (tmp_part) ? tmp_part : "",
- processor->cpu_architecture, (tmp_arch) ? tmp_arch : "",
- processor->cpu_variant,
- processor->cpu_revision,
- tmp_flags,
+ "%s", /* empty */
+ _("Processor"),
+ _("Linux Name"), processor->linux_name,
+ _("Decoded Name"), processor->model_name,
+ _("Mode"), arm_mode_str[processor->mode],
+ _("Frequency"), processor->cpu_mhz, _("MHz"),
+ _("BogoMips"), processor->bogomips,
+ _("Byte Order"), byte_order_str(),
+ tmp_topology,
+ tmp_cpufreq,
+ _("ARM"),
+ _("Implementer"), processor->cpu_implementer, (tmp_imp) ? tmp_imp : "",
+ _("Part"), processor->cpu_part, (tmp_part) ? tmp_part : "",
+ _("Architecture"), processor->cpu_architecture, (tmp_arch) ? tmp_arch : "",
+ _("Variant"), processor->cpu_variant,
+ _("Revision"), processor->cpu_revision,
+ _("Capabilities"), tmp_flags,
"");
g_free(tmp_flags);
+ g_free(tmp_cpufreq);
+ g_free(tmp_topology);
+ return ret;
+}
+gchar *processor_name(GSList *processors) {
+ /* compatible contains a list of compatible hardware, so be careful
+ * with matching order.
+ * ex: "ti,omap3-beagleboard-xm", "ti,omap3450", "ti,omap3";
+ * matches "omap3 family" first.
+ * ex: "brcm,bcm2837", "brcm,bcm2836";
+ * would match 2836 when it is a 2837.
+ */
+#define UNKSOC "(Unknown)"
+ const struct {
+ char *search_str;
+ char *vendor;
+ char *soc;
+ } dt_compat_searches[] = {
+ { "brcm,bcm2837", "Broadcom", "BCM2837" },
+ { "brcm,bcm2836", "Broadcom", "BCM2836" },
+ { "brcm,bcm2835", "Broadcom", "BCM2835" },
+ { "ti,omap5432", "Texas Instruments", "OMAP5432" },
+ { "ti,omap5430", "Texas Instruments", "OMAP5430" },
+ { "ti,omap4470", "Texas Instruments", "OMAP4470" },
+ { "ti,omap4460", "Texas Instruments", "OMAP4460" },
+ { "ti,omap4430", "Texas Instruments", "OMAP4430" },
+ { "ti,omap3620", "Texas Instruments", "OMAP3620" },
+ { "ti,omap3450", "Texas Instruments", "OMAP3450" },
+ { "ti,omap5", "Texas Instruments", "OMAP5-family" },
+ { "ti,omap4", "Texas Instruments", "OMAP4-family" },
+ { "ti,omap3", "Texas Instruments", "OMAP3-family" },
+ { "ti,omap2", "Texas Instruments", "OMAP2-family" },
+ { "ti,omap1", "Texas Instruments", "OMAP1-family" },
+ { "qcom,msm8939", "Qualcomm", "Snapdragon 615"},
+ { "qcom,msm", "Qualcomm", "Snapdragon-family"},
+ { "nvidia,tegra" "nVidia", "Tegra-family" },
+ { "bcm,", "Broadcom", UNKSOC },
+ { "nvidia," "nVidia", UNKSOC },
+ { "rockchip," "Rockchip", UNKSOC },
+ { "ti,", "Texas Instruments", UNKSOC },
+ { "qcom,", "Qualcom", UNKSOC },
+ { NULL, NULL }
+ };
+ gchar *ret = NULL;
+ gchar *compat = NULL;
+ int i;
+
+ compat = dtr_get_string("/compatible", 1);
+
+ if (compat != NULL) {
+ i = 0;
+ while(dt_compat_searches[i].search_str != NULL) {
+ if (strstr(compat, dt_compat_searches[i].search_str) != NULL) {
+ ret = g_strdup_printf("%s %s", dt_compat_searches[i].vendor, dt_compat_searches[i].soc);
+ break;
+ }
+ i++;
+ }
+ }
+ g_free(compat);
+ UNKIFNULL(ret);
+ return ret;
+}
+
+gchar *processor_describe(GSList * processors) {
+ return processor_describe_by_counting_names(processors);
+}
+
+gchar *processor_meta(GSList * processors) {
+ gchar *meta_soc = processor_name(processors);
+ gchar *meta_cpu_desc = processor_describe(processors);
+ gchar *meta_cpu_topo = processor_describe_default(processors);
+ gchar *meta_clocks = processor_frequency_desc(processors);
+ gchar *ret = NULL;
+ UNKIFNULL(meta_cpu_desc);
+ ret = g_strdup_printf("[%s]\n"
+ "%s=%s\n"
+ "%s=%s\n"
+ "%s=%s\n"
+ "%s=%s\n",
+ _("SOC/Package"),
+ _("Name"), meta_soc,
+ _("Description"), meta_cpu_desc,
+ _("Topology"), meta_cpu_topo,
+ _("Clocks"), meta_clocks );
+ g_free(meta_soc);
+ g_free(meta_cpu_desc);
+ g_free(meta_cpu_topo);
+ g_free(meta_clocks);
return ret;
}
gchar *processor_get_info(GSList * processors)
{
Processor *processor;
-
- if (g_slist_length(processors) > 1) {
gchar *ret, *tmp, *hashkey;
+ gchar *meta; /* becomes owned by more_info? no need to free? */
GSList *l;
- tmp = g_strdup("");
+ tmp = g_strdup_printf("$CPU_META$%s=\n", _("SOC/Package Information") );
+
+ meta = processor_meta(processors);
+ moreinfo_add_with_prefix("DEV", "CPU_META", meta);
for (l = processors; l; l = l->next) {
processor = (Processor *) l->data;
- tmp = g_strdup_printf(_("%s$CPU%d$%s=%.2fMHz\n"),
+ tmp = g_strdup_printf("%s$CPU%d$%s=%.2f %s\n",
tmp, processor->id,
processor->model_name,
- processor->cpu_mhz);
+ processor->cpu_mhz, _("MHz"));
hashkey = g_strdup_printf("CPU%d", processor->id);
moreinfo_add_with_prefix("DEV", hashkey,
processor_get_detailed_info(processor));
- g_free(hashkey);
+ g_free(hashkey);
}
ret = g_strdup_printf("[$ShellParam$]\n"
@@ -317,8 +377,4 @@ gchar *processor_get_info(GSList * processors)
g_free(tmp);
return ret;
- }
-
- processor = (Processor *) processors->data;
- return processor_get_detailed_info(processor);
}
generated by cgit v1.2.3 (git 2.39.1) at 2025-02-05 20:36:02 +0000