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path: root/modules/devices/riscv/riscv_data.c
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2024-05-24FIX GCC warnings arch/GCC version relatedhwspeedy
2024-03-09FIX Risc V Supervisor flag handlinghwspeedy
2024-03-09ADD Risc V new isa Zk,S,Uhwspeedy
2020-12-22docs: fix simple typo, insensitve -> insensitiveTim Gates
There is a small typo in modules/devices/riscv/riscv_data.c. Should read `insensitive` rather than `insensitve`.
2017-07-19x86,arm,riscv: Use gettext contexts and comments for cpu flagsBurt P
* flag defintion strings are grouped into contexts: x86-flag, arm-flag, riscv-ext * a comment is included for translators so that they know what flag the string defines without looking at the source code Signed-off-by: Burt P <pburt0@gmail.com>
2017-07-12x86,arm,riscv: small fixes and flag definition cosmetic tweaksBurt P
Signed-off-by: Burt P <pburt0@gmail.com>
2017-07-12x86,arm,riscv: make flag definitions translatableBurt P
Signed-off-by: Burt P <pburt0@gmail.com>
2017-07-12riscv: improve ISA string decodingBurt P
* Handle unknown future standard extensions better * Handle extension version numbers instead of just ignoring them * Test file riscv_fake_cpuinfo made more tricky Signed-off-by: Burt P <pburt0@gmail.com>
2017-07-12riscv: improvementsBurt P
Signed-off-by: Burt P <pburt0@gmail.com>
2017-07-12riscv: show extension setsBurt P
Signed-off-by: Burt P <pburt0@gmail.com>
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