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2024-05-24FIX GCC Warnings, added more checking to gcc flagshwspeedy
2024-02-16FIX Disable cpuflags for very old JSON <0.20.0 - FIX for ol6/c6/rh6hwspeedy
2024-02-08FIX QLcode - sscanf incorrect checkbigbear
2024-02-08FIX GCC Warningsbigbear
2024-02-08ADD Package building for hardinfo2bigbear
2024-02-08LICENSE Changed to GPL2+ for project and source code According to approval ↵bigbear
from copyright holders - see: https://github.com/lpereira/hardinfo/issues/530 https://github.com/lpereira/hardinfo/issues/707
2021-11-07Update copyright informationL Pereira
2021-04-25Make CPU flags database updatableLeandro Pereira
2020-05-17Fix more formatting errorsLeandro Pereira
2019-12-27x86: use vendor flag for vendor fieldsBurt P
Signed-off-by: Burt P <pburt0@gmail.com>
2019-11-16x86/processor: update mallocOndrej Čerman
Co-Authored-By: Leandro A. F. Pereira <leandro@hardinfo.org>
2019-11-16x86/processor: malloc bufferOndrej Čerman
2019-11-16x86/processor: bigger buffer for cpuinfoOndrej Čerman
2019-08-10name cleanup for x86 model strings and intel pci device stringsBurt P
x86 CPU: * Remove (R), (TM), etc * AMD: remove redundant "X2 Dual Core", "X4 Quad Core", etc * Move vendor to front if not already * Remove speed, as the actual speed is usually right next to it * Remove "CPU", "APU", "Processor" to shorten * Compress space Intel GPU: * Remove (R) * Abbreviate "Generation": "Gen" * Remove "Processor", "Controller", and "Device" to shorten * Compress space Some examples: x86 CPU: 'AMD Turion(tm) 64 Mobile Technology ML-32' ---> 'AMD Turion 64 Mobile ML-32' 'Cyrix MediaGXtm MMXtm Enhanced' ---> 'Cyrix MediaGX MMX Enhanced' 'Transmeta(tm) Crusoe(tm) Processor TM5800' ---> 'Transmeta Crusoe TM5800' 'VIA Nano X2 L4350 @ 1.6+ GHz' ---> 'VIA Nano X2 L4350' 'AMD Athlon(tm) 64 X2 Dual-Core Processor TK-53' ---> 'AMD Athlon 64 X2 TK-53' 'Embedded AMD Opteron(tm) Processor 23KS EE' ---> 'AMD Embedded Opteron 23KS EE' 'Intel(R) Atom(TM) x5-Z8300 CPU @ 1.44GHz' ---> 'Intel Atom x5-Z8300' 'Intel(R) Pentium(R) III CPU - S 1400MHz' ---> 'Intel Pentium III - S' 'Dual Core AMD Opteron(tm) Processor 165' ---> 'AMD Dual Core Opteron 165' 'Genuine Intel(R) CPU T1350 @ 1.86GHz' ---> 'Intel T1350' 'AMD Phenom(tm) 9350e Quad-Core Processor' ---> 'AMD Phenom 9350e Quad-Core' Intel GPU: 'Atom/Celeron/Pentium Processor x5-E8000/J3xxx/N3xxx Integrated Graphics Controller' ---> 'Atom/Celeron/Pentium x5-E8000/J3xxx/N3xxx Integrated Graphics' '4th Generation Core Processor Family Integrated Graphics Controller' ---> '4th Gen Core Family Integrated Graphics' 'Mobile GM965/GL960 Integrated Graphics Controller (secondary)' ---> 'Mobile GM965/GL960 Integrated Graphics (secondary)' 'Mobile 915GM/GMS/910GML Express Graphics Controller' ---> 'Mobile 915GM/GMS/910GML Express Graphics' Also: Fix/replace the appf() and SEQ() that were peppered about. Signed-off-by: Burt P <pburt0@gmail.com>
2019-07-12Show links for vendorsLeandro Pereira
2019-07-04Plug memory leak in dmi_socket_info()Leandro Pereira
2019-07-02x86: use new dmi_* typesBurt P
Signed-off-by: Burt P <pburt0@gmail.com>
2019-06-22DMI socket/module information moved from Processor to Memory DMIBurt P
As discussed in https://github.com/lpereira/hardinfo/issues/345 Signed-off-by: Burt P <pburt0@gmail.com>
2018-11-04arm/x86: include package info details in reportsBurt P
Signed-off-by: Burt P <pburt0@gmail.com>
2018-10-22x86: add mfgr and part to memory socket infoBurt P
Signed-off-by: Burt P <pburt0@gmail.com>
2018-10-22x86: add socket information from dmidecode, if availableBurt P
Signed-off-by: Burt P <pburt0@gmail.com>
2018-09-26arm/x86: clocks list empty when cpufreq is not availableBurt P
Signed-off-by: Burt P <pburt0@gmail.com>
2018-09-08x86: l1tf bug flag definitionBurt P
Signed-off-by: Burt P <pburt0@gmail.com>
2018-05-29x86: CPU bug flag for speculative store bypass attackBurt P
Signed-off-by: Burt P <pburt0@gmail.com>
2018-02-27x86: free urefBurt P
Signed-off-by: Burt P <pburt0@gmail.com>
2018-02-27x86: fix for kernels that don't provide cache idBurt P
Use shared_cpu_list as a unique cache id, but only in the case that kernel-supplied cache id is not available. Signed-off-by: Burt P <pburt0@gmail.com>
2018-02-27x86,arm: cpu clocks list in package informationBurt P
Show actual clocks where cores or threads share a clock. Ex: x86 SMT each core has one clock shared by both threads. Ex: BCM2837 has one clock for all four cores. Signed-off-by: Burt P <pburt0@gmail.com>
2018-02-09x86: metldown and spectre bug flagsBurt P
Signed-off-by: Burt P <pburt0@gmail.com>
2018-02-09x86: increase the cpuinfo read buffer sizeBurt P
The flags list is often more than 512 bytes long these days. It was being truncated. Signed-off-by: Burt P <pburt0@gmail.com>
2018-02-09Add Intel cpu_insecure bug workaround flagBurt P
cpu_insecure = page table isolation is being used to work around a security vulnerability in Intel x86 CPUs. Signed-off-by: Burt P <pburt0@gmail.com>
2017-12-09x86: add summary of caches to package informationBurt P
Show actual physical caches by counting only unique references from each "cpu" (hardware thread). Signed-off-by: Burt P <pburt0@gmail.com>
2017-11-29x86 CPU flags fix; show socket:core and thread in proc listBurt P
* Bug fix: Some flags are just an index, for example power management might have "[13] [14]" as flags. This looks like a new section to hardinfo shell and it truncates the CPU information there. * Show the Socket:Core and thread in the processor list, for x86 only right now. In the future, the idea is to show only one line for each core, and list the threads on that core, where currently, there is one line for each thread. Signed-off-by: Burt P <pburt0@gmail.com>
2017-08-12x86: add microcode version to reported informationBurt P
Signed-off-by: Burt P <pburt0@gmail.com>
2017-08-11Make MHz translatable in CPU listBurt P
It was kindof translatable before, but as part of a messy use-once c-format string. In this form it is re-usable elsewhere. Signed-off-by: Burt P <pburt0@gmail.com>
2017-08-11Separate processor name and description + count cores and threadsBurt P
* add cpu_procs_cores_threads() function to get counts from sysfs/topology * each platform must now provide processor_name() and processor_describe() * processor_name_default(): returns a list of unique processor->model_name * processor_describe_default(): returns "N physical; M cores; L threads" * processor_describe_by_counting_names(): returns a list of unique processor->model_name with Nx prefix (ex: "4x ARM Cortex A53 + 4x ARM Cortex A33") * x86: _name and _describe use defaults * arm: _name returns name of SOC, if available, _describe returns processor_describe_by_counting_names() * all other platforms: _name and _describe use defaults * Computer module summary now shows both name and description for CPU Signed-off-by: Burt P <pburt0@gmail.com>
2017-07-19x86: fix old bug in old bug detectionBurt P
Signed-off-by: Burt P <pburt0@gmail.com>
2017-07-19x86 flag definition lookup changesBurt P
* Avoid using GHashTable * Use single flag lookup table with bug: and pm: prefixes to avoid flag name collisions Signed-off-by: Burt P <pburt0@gmail.com>
2017-07-19x86: strdup() some const strings before g_hash_table_insert()Burt P
Signed-off-by: Burt P <pburt0@gmail.com>
2017-07-19x86,arm,riscv: Use gettext contexts and comments for cpu flagsBurt P
* flag defintion strings are grouped into contexts: x86-flag, arm-flag, riscv-ext * a comment is included for translators so that they know what flag the string defines without looking at the source code Signed-off-by: Burt P <pburt0@gmail.com>
2017-07-19Make cache type strings translatableBurt P
Signed-off-by: Burt P <pburt0@gmail.com>
2017-07-12x86,arm,riscv: small fixes and flag definition cosmetic tweaksBurt P
Signed-off-by: Burt P <pburt0@gmail.com>
2017-07-12x86,arm,riscv: make flag definitions translatableBurt P
Signed-off-by: Burt P <pburt0@gmail.com>
2017-07-12Move common processor stuff into cpu_util.{h,c}Burt P
* PROC_CPUINFO define used in testing * STRIFNULL(), UNKIFNULL() EMPIFNULL() macros used in reading cpuinfo * byte order, topology, and cpufreq data structures and functions that are platform independent * processor_has_flag() helper Signed-off-by: Burt P <pburt0@gmail.com>
2017-07-12Add CMake options to allow testing various platform's processor.cBurt P
Signed-off-by: Burt P <pburt0@gmail.com>
2017-07-12Cleanup all platform's proccessor.c, use translatable labels.Burt P
Signed-off-by: Burt P <pburt0@gmail.com>
2017-07-12x86: make cache info translatableBurt P
Signed-off-by: Burt P <pburt0@gmail.com>
2017-07-12x86,arm,ppc: more processor label strings translatableBurt P
Signed-off-by: Burt P <pburt0@gmail.com>
2017-07-12x86: remove "Has FPU"Burt P
FPU is listed in capabilities. Signed-off-by: Burt P <pburt0@gmail.com>
2017-07-12x86,arm,ppc: code commentsBurt P
Signed-off-by: Burt P <pburt0@gmail.com>
2017-07-12x86: remove large sprintf() format string from translationBurt P
It was broken into smaller pieces by earlier commits. Signed-off-by: Burt P <pburt0@gmail.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-02-05 23:03:21 +0000