Age | Commit message (Collapse) | Author |
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from copyright holders - see: https://github.com/lpereira/hardinfo/issues/530 https://github.com/lpereira/hardinfo/issues/707
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Untested.
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The previous LoongArch support added in commit 56e590d was based on the kernel behavior before the official upstream merge.
Stable cpuinfo: https://git.kernel.org/torvalds/c/7153c3c
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Close #15.
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information has been moved to separate file.
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defined as 0 and sensors.h is not available
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Fixes #590
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There is a small typo in modules/devices/riscv/riscv_data.c.
Should read `insensitive` rather than `insensitve`.
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the values are aligned to the cols
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E2K (Elbrus 2000) - this is VLIW/EPIC architecture, like Intel Itanium (IA-64) architecture.
Ref: https://en.wikipedia.org/wiki/Elbrus_2000
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Information gathered by @bp0. Closes #555.
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