From 2a0146b4312c4171828e8faf8438cf1cb9e6447b Mon Sep 17 00:00:00 2001 From: Burt P Date: Mon, 10 Jul 2017 18:12:49 -0500 Subject: x86,arm,riscv: make flag definitions translatable Signed-off-by: Burt P --- modules/devices/riscv/riscv_data.c | 45 ++++++++++++++++++++++---------------- 1 file changed, 26 insertions(+), 19 deletions(-) (limited to 'modules/devices/riscv/riscv_data.c') diff --git a/modules/devices/riscv/riscv_data.c b/modules/devices/riscv/riscv_data.c index 21a16096..b61a85de 100644 --- a/modules/devices/riscv/riscv_data.c +++ b/modules/devices/riscv/riscv_data.c @@ -23,27 +23,34 @@ #include #include "riscv_data.h" +#ifndef _ +#define _(String) String +#endif +#ifndef N_ +#define N_(String) String +#endif + static struct { char *name, *meaning; } tab_ext_meaning[] = { - { "RV32", "32-bit" }, - { "RV64", "64-bit" }, - { "RV128", "128-bit" }, - { "E", "Base embedded integer instructions (15 registers)" }, - { "I", "Base integer instructions (31 registers)" }, - { "M", "Hardware integer multiply and divide" }, - { "A", "Atomic memory operations" }, - { "C", "Compressed 16-bit instructions" }, - { "F", "Floating-point instructions, single-precision" }, - { "D", "Floating-point instructions, double-precision" }, - { "Q", "Floating-point instructions, quad-precision" }, - { "B", "Bit manipulation instructions" }, - { "V", "Vector operations" }, - { "T", "Transactional memory" }, - { "P", "Packed SIMD instructions" }, - { "L", "Decimal floating-point instructions" }, - { "J", "Dynamically translated languages" }, - { "N", "User-level interrupts" }, + { "RV32", N_("32-bit") }, + { "RV64", N_("64-bit") }, + { "RV128", N_("128-bit") }, + { "E", N_("Base embedded integer instructions (15 registers)") }, + { "I", N_("Base integer instructions (31 registers)") }, + { "M", N_("Hardware integer multiply and divide") }, + { "A", N_("Atomic memory operations") }, + { "C", N_("Compressed 16-bit instructions") }, + { "F", N_("Floating-point instructions, single-precision") }, + { "D", N_("Floating-point instructions, double-precision") }, + { "Q", N_("Floating-point instructions, quad-precision") }, + { "B", N_("Bit manipulation instructions") }, + { "V", N_("Vector operations") }, + { "T", N_("Transactional memory") }, + { "P", N_("Packed SIMD instructions") }, + { "L", N_("Decimal floating-point instructions") }, + { "J", N_("Dynamically translated languages") }, + { "N", N_("User-level interrupts") }, { NULL, NULL } }; @@ -58,7 +65,7 @@ const char *riscv_ext_meaning(const char *ext) { l = strlen(ext); while(tab_ext_meaning[i].name != NULL) { if (strncasecmp(tab_ext_meaning[i].name, ext, l) == 0) - return tab_ext_meaning[i].meaning; + return _(tab_ext_meaning[i].meaning); i++; } } -- cgit v1.2.3