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authorBurt P <pburt0@gmail.com>2017-07-09 21:27:34 -0500
committerLeandro Pereira <leandro@hardinfo.org>2017-07-12 19:38:41 -0700
commit86525d099c58e7e2d329107361398288c7c01296 (patch)
treed8c78576e9bd40d44001d226258e02d27cbdd6c8 /test/data/mips_loongson_cpuinfo
parentace9c299ee461a4eb63f94de2a3f48ce4480248e (diff)
mips: fix, add test
Signed-off-by: Burt P <pburt0@gmail.com>
Diffstat (limited to 'test/data/mips_loongson_cpuinfo')
-rw-r--r--test/data/mips_loongson_cpuinfo13
1 files changed, 13 insertions, 0 deletions
diff --git a/test/data/mips_loongson_cpuinfo b/test/data/mips_loongson_cpuinfo
new file mode 100644
index 00000000..f2ee0e90
--- /dev/null
+++ b/test/data/mips_loongson_cpuinfo
@@ -0,0 +1,13 @@
+system type : gdium
+processor : 0
+cpu model : ICT Loongson-2 V0.3 FPU V0.1
+BogoMIPS : 598.60
+wait instruction : no
+microsecond timers : yes
+tlb_entries : 64
+extra interrupt vector : no
+hardware watchpoint : no
+ASEs implemented :
+shadow register sets : 1
+VCED exceptions : not available
+VCEI exceptions : not available