| Age | Commit message (Expand) | Author |
|---|---|---|
| 2024-03-09 | FIX Risc V Supervisor flag handling | hwspeedy |
| 2024-03-09 | ADD Risc V new isa Zk,S,U | hwspeedy |
| 2020-12-22 | docs: fix simple typo, insensitve -> insensitive | Tim Gates |
| 2017-07-19 | x86,arm,riscv: Use gettext contexts and comments for cpu flags | Burt P |
| 2017-07-12 | x86,arm,riscv: small fixes and flag definition cosmetic tweaks | Burt P |
| 2017-07-12 | x86,arm,riscv: make flag definitions translatable | Burt P |
| 2017-07-12 | riscv: improve ISA string decoding | Burt P |
| 2017-07-12 | riscv: improvements | Burt P |
| 2017-07-12 | riscv: show extension sets | Burt P |
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index : hardinfo2.git | |
| Unnamed repository; edit this file 'description' to name the repository. | www-data |
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