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Age	Commit message (Expand)	Author
2021-12-22	clk: Don't parent clks until the parent is fully registered	Mike Tipton
2021-12-14	clk: imx: use module_platform_driver	Miles Chen
2021-12-14	clk: qcom: regmap-mux: fix parent clock lookup	Dmitry Baryshkov
2021-11-26	clk: qcom: gcc-msm8996: Drop (again) gcc_aggre1_pnoc_ahb_clk	Dmitry Baryshkov
2021-11-26	clk/ast2600: Fix soc revision for AHB	Joel Stanley
2021-11-26	clk: ingenic: Fix bugs with divided dividers	Paul Cercueil
2021-11-26	clk: imx: imx6ul: Move csi_sel mux to correct base register	Stefan Riedmueller
2021-11-18	clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULL	Claudiu Beznea
2021-11-18	clk: at91: check pmc node status before registering syscore ops	Clément Léger
2021-11-18	clk: mvebu: ap-cpu-clk: Fix a memory leak in error handling paths	Christophe JAILLET
2021-10-20	clk: socfpga: agilex: fix duplicate s2f_user0_clk	Dinh Nguyen
2021-09-30	treewide: Change list_sort to use const pointers	Sami Tolvanen
2021-09-18	clk: at91: clk-generated: Limit the requested rate to our range	Codrin Ciubotariu
2021-09-18	clk: imx8m: fix clock tree update of TF-A managed clocks	Ahmad Fatoum
2021-09-18	clk: rockchip: drop GRF dependency for rk3328/rk3036 pll types	Peter Geis
2021-09-18	clk: socfpga: agilex: add the bypass register for s2f_usr0 clock	Dinh Nguyen
2021-09-18	clk: socfpga: agilex: fix up s2f_user0_clk representation	Dinh Nguyen
2021-09-18	clk: socfpga: agilex: fix the parents of the psi_ref_clk	Dinh Nguyen
2021-09-15	clk: kirkwood: Fix a clocking boot regression	Linus Walleij
2021-09-03	clk: renesas: rcar-usb2-clock-sel: Fix kernel NULL pointer dereference	Adam Ford
2021-08-26	clk: qcom: gdsc: Ensure regulator init state matches GDSC state	Bjorn Andersson
2021-08-26	clk: imx6q: fix uart earlycon unwork	Dong Aisheng
2021-08-12	clk: fix leak on devm_clk_bulk_get_all() unwind	Brian Norris
2021-08-12	clk: tegra: Implement disable_unused() of tegra_clk_sdmmc_mux_ops	Dmitry Osipenko
2021-08-12	clk: stm32f4: fix post divisor setup for I2S/SAI PLLs	Dario Binacchi
2021-07-19	clk: tegra: Ensure that PLLU configuration is applied properly	Dmitry Osipenko
2021-07-19	clk: tegra: Fix refcounting of gate clocks	Dmitry Osipenko
2021-07-19	clk: renesas: r8a77995: Add ZA2 clock	Kuninori Morimoto
2021-07-19	clk: renesas: rcar-usb2-clock-sel: Fix error handling in .probe()	Dinghao Liu
2021-07-14	clk: si5341: Update initialization magic	Robert Hancock
2021-07-14	clk: si5341: Check for input clock presence and PLL lock on startup	Robert Hancock
2021-07-14	clk: si5341: Avoid divide errors due to bogus register contents	Robert Hancock
2021-07-14	clk: si5341: Wait for DEVICE_READY on startup	Robert Hancock
2021-07-14	clk: qcom: clk-alpha-pll: fix CAL_L write in alpha_pll_fabia_prepare	Jonathan Marek
2021-07-14	clk: actions: Fix AHPPREDIV-H-AHB clock chain on Owl S500 SoC	Cristian Ciocaltea
2021-07-14	clk: actions: Fix bisp_factor_table based clocks on Owl S500 SoC	Cristian Ciocaltea
2021-07-14	clk: actions: Fix SD clocks factor table on Owl S500 SoC	Cristian Ciocaltea
2021-07-14	clk: actions: Fix UART clock dividers on Owl S500 SoC	Cristian Ciocaltea
2021-07-14	clk: imx8mq: remove SYS PLL 1/2 clock gates	Lucas Stach
2021-07-14	clk: vc5: fix output disabling when enabling a FOD	Luca Ceresoli
2021-07-14	clk: tegra30: Use 300MHz for video decoder by default	Dmitry Osipenko
2021-07-14	clk: meson: g12a: fix gp0 and hifi ranges	Jerome Brunet
2021-07-14	clk: agilex/stratix10: fix bypass representation	Dinh Nguyen
2021-07-14	clk: agilex/stratix10: remove noc_clk	Dinh Nguyen
2021-07-14	clk: agilex/stratix10/n5x: fix how the bypass_reg is handled	Dinh Nguyen
2021-05-19	clk: exynos7: Mark aclk_fsys1_200 as critical	Paweł Chmiel
2021-05-14	clk: uniphier: Fix potential infinite loop	Colin Ian King
2021-05-14	clk: qcom: apss-ipq-pll: Add missing MODULE_DEVICE_TABLE	Chen Hui
2021-05-14	clk: qcom: a53-pll: Add missing MODULE_DEVICE_TABLE	Chen Hui
2021-05-14	clk: zynqmp: pll: add set_pll_mode to check condition in zynqmp_pll_enable	Quanyang Wang